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InP MZ modulator of sub 1-V pp driving voltage with quasi-traveling-wave electrode structure and Logic IC of 90-nm CMOS process as its driver were developed. Their applicability was demonstrated throu...
A Si APD was fabricated by standard 0.18 μ m CMOS process. The maximum avalanche gain was 224 for only 8 V bias. The bandwidth was 1.6 GHz for low avalanche gain and 800 MHz for large avalanche gain.
We discuss our approach to monolithic intergration of Ge photodectors with CMOS electronics for high-speed optical transceivers. Receivers based on Ge waveguide photodetectors achieve a sensitivity of...

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