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Embedded microprocessors are an important component of reconfigurable architectures. Fine-grain (e.g., cycle-accurate) power analysis of such processors has been used to improve power and energy effic...
Cross-core last-level cache (LLC) eviction based sidechannel attacks are becoming practical because of the inclusive nature of shared resources (e.g., an inclusive LLC), that creates back-invalidat...
Tendermint-core blockchains offer strong consistency (no forks) in an open system relying on two ingredients (i) a set of validators that generate blocks via a variant of Practical Byzantine Fault Tol...
NORX is one of the fifteen authenticated encryption algorithms that have reached the third round of the CAESAR competition. NORX is built using the sponge-based Monkey Duplex construction. In this not...
Elliptic Curve Cryptography (ECC) is gaining popularity in recent years. Having short keys and short signatures in particular makes ECC likely to be adopted in numerous internet-of-things (IoT) device...
The implementation of the AES encryption core by Moradi et al. at Eurocrypt 2011 is one of the smallest in terms of gate area. The circuit takes around 2400 gates and operates on an 8 bit datapath. ...
We explore how many-core platforms can be used to enhance the security of future systems and to support important security properties such as runtime isolation using a small Trusted Computing Base (T...
Elliptic Curve Cryptography (ECC) is a popular tool to construct public-key crypto-systems. The security of ECC is based on the hardness of the elliptic curve discrete logarithm problem (ECDLP). Imp...
Emerging applications such as the Internet of Things require security solutions that are small and low cost, yet feature solid protection against a wide range of sophisticated attacks. Lightweight c...
This paper presents the design and analysis of an area efficient implementation of the SHA-3 candidate Blue MidnightWish hash function with different digest sizes of 256 and 512 bits on an FPGA platfo...
The stream cipher BIVIUM (both BIVIUM-A and BIVIUM-B), a modification of the eSTREAM ¯nalist TRIVIUM, can be broken completely by the Algebraic IV Differential Attack, AIDA, using 227:5 simulat...
We present an efficient implementation of T pairing on Intel Core 2 Duo processor. The processing speed of our implementation achieves 92 sec over F97 3 and 553 sec over F193 3 on 2.6GHz processor...
A most critical and complex issue with regard to constrained devices in the ubiquitous and pervasive computing setting is secure key exchange. The restrictions motivate the investigation and discus...

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