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Most of the existing public transit routing algorithms were developed on the basis of graph theory. Recently, algorithms are being developed that can compute for O-D public transit paths by using time...
The Border Gateway Protocol (BGP) computes routes between the organizational networks that make up today's Internet. Unfortunately, BGP suffers from deficiencies, including slow convergence, security ...
We consider dynamic link networks(DLN), where nodes are static, but the links are highly dynamic. Reliable multi-hop communication is critical in such networks, which inspires receiver contention rout...
We formulate and study the algorithmic mechanism design problem for a general class of resource allocation settings,where the center redistributes the private resources brought by individuals. Money t...
This work deals with DPA-resistant logic styles, i.e., celllevel countermeasures against power analysis attacks that are known as a serious threat to cryptographic devices. Early propagation and imb...
The onion routing (OR) network Tor provides anonymity to its users by routing their encrypted traffic through three proxies (or nodes). The key cryptographic challenge, here, is to establish symmetri...
TORCH:A Design Tool for Routing Channel Segmentation in FPGAs.
Placement and Routing For A Field Programmable Multi-Chip Module.
An FPGA Family Optimized for High Densities and Reduced Routing Delay.
We give a rigorous and self-contained survey of the abelian sandpile model and rotor-router model on finite directed graphs, highlighting the connections between them. We present several intriguing op...
A new statistical model for routing of gate arrays is described. The model takes into consideration the effect of gate utilization on wiring area requirement. Model computed wiring area estimates sugg...
This paper presents a novel and effective stra-tegy for routing custom integrated circuits as well as solutions to subproblems associated with this strategy. Given an initial placement of rectangular ...
This paper describes a new programmable routing fabric for field-programmable gate arrays (FPGAs). Our results show that an FPGA using this fabric can achieve 1.57 times lower dynamic power consumptio...
This paper proposes a systematic strategy to efficiently explore the design space of field-programmable gate array (FPGA) routing architectures. The key idea is to use stochastic methods to quickly lo...

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